A graphic chip supports several graphic engines. These engines can use independent memory spaces, but use a common resources in certain logics (e.g., the translation lookaside buffer (TLB) logic and memory request logic). These common resources could become blocked in the case of page faults from a specific engine, but because they are common, it is possible that the faulty engine would overtake the totality of the resources, and block entirely all the engines pipelines, and not just the faulty one. It is generally required of the computing system for the engines to be able to make progress independently. Furthermore, it is possible that by clogging the whole fabric (e.g., interconnect and buses) associated with the common resources, deadlock scenarios could occur.